RiverWare Bug Report #4315 -- Old Precision Estimate Criteria -- 10-21-2007 ----------------------------------------------------------------------------- int64 simObjPrec ((int64) _simObjSel -> precisionEstimate()); // see below int64 acctPrec ((int64) _accountSel -> precisionEstimate()); // see below int64 slotPrec ((int64) _slotSel -> precisionEstimate()); // see below int64 selRootClass (terminalStatic ? 1 : 0); switch (_rootType) { case Root::SUBCLASS_SIMOBJ: selRootClass += 2; break; case Root::SUBCLASS_ACCOUNT: selRootClass += 4; break; case Root::SUBCLASS_SLOT: selRootClass += 6; break; } const int64 precEst ( (selRootClass << 48) | (simObjPrec << 32) | (acctPrec << 16) | slotPrec ); ----------------------------------------------------------------------------- int SelectionPart_SimObj::precisionEstimate() const // Criteria, in order of precision (highest, first): // 1 bit: Static > Wildcarded // For Static: // 15 bits: SimObj count Smaller > Larger // For Dynamic: // 6 bits: Number of SimClasses: Fewer > More // 4 bits: Number of Active Root Filters: Fewer < More // 4 bits: Index of First Root Filter int SelectionPart_Account::precisionEstimate() const // Criteria, in order of precision (highest, first): // 1 bit: Static > Wildcarded // For Static: // 15 bits: Slot count Smaller > Larger // For Dynamic: // 2 bits: Number of Acct types (Store, Div, PThru): Fewer > More // 4 bits: Number of Active Root Filters: Fewer < More // 4 bits: Index of First Root Filter int SelectionPart_Slot::precisionEstimate() const // Criteria, in order of precision (highest, first): // 1 bit: Static > Wildcarded // For Static: // 15 bits: Slot count Smaller > Larger // For Dynamic: // 4 bits: Number of Active Root Filters: Fewer < More // 4 bits: Index of First Root Filter // 1 bit: AggSeries columns included // 1 bit: TableSeries columns included // 1 bit: Table columns included -----------------------------------------------------------------------------