RiverWare Bug Report #4315 -- Old Precision Estimate Code Excerpt -- 10-21-2007

//-----------------------------------------------------------------------------

int64 RootSelection::precisionEstimate() const
int SelectionPart_SimObj::precisionEstimate() const
int SelectionPart_Account::precisionEstimate() const
int SelectionPart_Slot::precisionEstimate() const

//-----------------------------------------------------------------------------

int64 RootSelection::precisionEstimate() const
{
   if (terminalPartHasStaticEmptyRange())
   {
      return (0);
      //------->>
   }

   const int64 simObjPrec ((int64) _simObjSel  -> precisionEstimate());
   const int64 acctPrec   ((int64) _accountSel -> precisionEstimate());
   const int64 slotPrec   ((int64) _slotSel    -> precisionEstimate());

   const SelectionPartBase (*terminalPart) (getTerminalSelectionPartConst());
   bool terminalStatic (terminalPart && !terminalPart->isWildcarded());

   int64 selRootClass (terminalStatic ? 1 : 0);
   switch (_rootType)
   {
      case Root::SUBCLASS_SIMOBJ:  selRootClass += 2;  break;
      case Root::SUBCLASS_ACCOUNT: selRootClass += 4;  break;
      case Root::SUBCLASS_SLOT:    selRootClass += 6;  break;
   }

   const int64 precEst ( (selRootClass << 48)
                       | (simObjPrec   << 32)
                       | (acctPrec     << 16)
                       | slotPrec );

   return (precEst);
}

//-----------------------------------------------------------------------------

// virtual from SelectionPartBase
int SelectionPart_SimObj::precisionEstimate() const
{
   int precVal (0);

   // Criteria, in order of precision (highest, first):
   // 1 bit:  Static > Wildcarded
   // For Static:
   //    15 bits: SimObj count Smaller > Larger
   // For Dynamic:
   //     6 bits: Number of SimClasses: Fewer > More
   //     4 bits: Number of Active Root Filters: Fewer < More
   //     4 bits: Index of First Root Filter

   if (!_wildcarded)
   {
      const int rangeSize = std::min (0x7FFF, _rangeList.size());
      precVal = (0x8000 | (0x7FFF - (unsigned int) rangeSize));
   }

   else // (_wildcarded)
   {
      int classCnt (0);
      if (_simObjClassNames.contains ("All"))
         classCnt = 63;
      else
         classCnt = std::min (63, _simObjClassNames.size());
      const int classVal (63 - classCnt); // fewer classes == more precise.

      RootFilter::FilterType firstActiveFilterType (RootFilter::FILTER_UND);
      int activeFilterCount = RootFilter::activeFiltersCnt (
                                _filters, &firstActiveFilterType);
      int activeFilterCntVal (std::min (15, activeFilterCount));
      int firstActiveFilterInt (std::min (15, (int) firstActiveFilterType));

      precVal = (classVal << 8)
              + (activeFilterCntVal << 4)
              + firstActiveFilterInt;
   }

   return (precVal);
}

//-----------------------------------------------------------------------------

// virtual from SelectionPartBase
int SelectionPart_Account::precisionEstimate() const
{
   int precVal (0);

   // Criteria, in order of precision (highest, first):
   // 1 bit:  Static > Wildcarded
   // For Static:
   //    15 bits: Slot count Smaller > Larger
   // For Dynamic:
   //     2 bits: Number of Acct types (Store, Div, PThru): Fewer > More
   //     4 bits: Number of Active Root Filters: Fewer < More
   //     4 bits: Index of First Root Filter

   if (!_wildcarded)
   {
      const int rangeSize = std::min (0x7FFF, _rangeList.size());
      precVal = (0x8000 | (0x7FFF - (unsigned int) rangeSize));
   }

   else // (_wildcarded)
   {
      int acctTypeInt (0);
      if (!_inclStorageAccts)      acctTypeInt += 1;
      if (!_inclDiversionAccts)    acctTypeInt += 1;
      if (!_inclInstreamFlowAccts) acctTypeInt += 1;
      if (!_inclPassThroughAccts)  acctTypeInt += 1;

      RootFilter::FilterType firstActiveFilterType (RootFilter::FILTER_UND);
      int activeFilterCount = RootFilter::activeFiltersCnt (
                                _filters, &firstActiveFilterType);
      int activeFilterCntVal (std::min (15, activeFilterCount));
      int firstActiveFilterInt (std::min (15, (int) firstActiveFilterType));

      precVal = (acctTypeInt << 8)
              + (activeFilterCntVal << 4)
              + firstActiveFilterInt;
   }

   return (precVal);
}

//-----------------------------------------------------------------------------

// virtual from SelectionPartBase
int SelectionPart_Slot::precisionEstimate() const
{
   int precVal (0);

   // Criteria, in order of precision (highest, first):
   // 1 bit:  Static > Wildcarded
   // For Static:
   //    15 bits: Slot count Smaller > Larger
   // For Dynamic:
   //     4 bits: Number of Active Root Filters: Fewer < More
   //     4 bits: Index of First Root Filter
   //     1 bit:  AggSeries columns included
   //     1 bit:  TableSeries columns included
   //     1 bit:  Table columns included

   if (!_wildcarded)
   {
      const int rangeSize = std::min (0x7FFF, _slotColRangeList.size());
      precVal = (0x8000 | (0x7FFF - (unsigned int) rangeSize));
   }

   else // (_wildcarded)
   {
      RootFilter::FilterType firstActiveFilterType (RootFilter::FILTER_UND);
      int activeFilterCount = RootFilter::activeFiltersCnt (
                                _filters, &firstActiveFilterType);
      int activeFilterCntVal (std::min (15, activeFilterCount));
      int firstActiveFilterInt (std::min (15, (int) firstActiveFilterType));

      int colTypeVal (0);
      if (!_showAggSeriesSlotCols)   colTypeVal += 4;
      if (!_showTableSeriesSlotCols) colTypeVal += 2;
      if (!_showTableSlotCols)       colTypeVal += 1;

      precVal = (activeFilterCntVal << 8)
              + (firstActiveFilterInt << 4)
              + colTypeVal;
   }

   return (precVal);
}

//-----------------------------------------------------------------------------